On-Chip Training NPU - Algorithm, Architecture and SoC Design - Hoi-Jun Yoo (Buch)

Hoi-Jun Yoo: On-Chip Training NPU - Algorithm, Architecture and SoC Design

Hoi-Jun Yoo, Donghyeon Han

On-Chip Training NPU - Algorithm, Architecture and SoC Design

Buch

lieferbar innerhalb 2-3 Wochen
(soweit verfügbar beim Lieferanten)

EUR 106,66*

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Springer Nature Switzerland, 07/2024
Einband: Kartoniert / Broschiert, Paperback
Sprache: Englisch
ISBN-13: 9783031342394
Bestellnummer: 11932012
Umfang: 264 Seiten
Auflage: 2023
Gewicht: 406 g
Maße: 235 x 155 mm
Stärke: 15 mm
Erscheinungstermin: 29.7.2024
Achtung: Artikel ist nicht in deutscher Sprache!

Weitere Ausgaben von On-Chip Training NPU - Algorithm, Architecture and SoC Design

Klappentext

Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.